.p_lvl2_lat = 0x0fff, /* >100, means we do not support C2 state */
.p_lvl3_lat = 0x0fff, /* >1000, means we do not support C3 state */
.iapc_boot_arch = ACPI_8042,
- .flags = (ACPI_PROC_C1 | ACPI_SLP_BUTTON |
+ .flags = (ACPI_PROC_C1 |
ACPI_WBINVD |
ACPI_FIX_RTC | ACPI_TMR_VAL_EXT),
}
break;
+ case XEN_DOMCTL_SENDTRIGGER_SLEEP:
+ {
+ extern void hvm_acpi_sleep_button(struct domain *d);
+
+ ret = -EINVAL;
+ if ( is_hvm_domain(d) )
+ {
+ ret = 0;
+ hvm_acpi_sleep_button(d);
+ }
+ }
+ break;
+
default:
ret = -ENOSYS;
}
#define TMR_STS (1 << 0)
#define GBL_STS (1 << 5)
#define PWRBTN_STS (1 << 8)
+#define SLPBTN_STS (1 << 9)
/* The same in PM1a_EN */
#define TMR_EN (1 << 0)
#define GBL_EN (1 << 5)
#define PWRBTN_EN (1 << 8)
+#define SLPBTN_EN (1 << 9)
/* Mask of bits in PM1a_STS that can generate an SCI. */
-#define SCI_MASK (TMR_STS|PWRBTN_STS|GBL_STS)
+#define SCI_MASK (TMR_STS|PWRBTN_STS|SLPBTN_STS|GBL_STS)
/* SCI IRQ number (must match SCI_INT number in ACPI FADT in hvmloader) */
#define SCI_IRQ 9
spin_unlock(&s->lock);
}
+void hvm_acpi_sleep_button(struct domain *d)
+{
+ PMTState *s = &d->arch.hvm_domain.pl_time.vpmt;
+ spin_lock(&s->lock);
+ s->pm.pm1a_sts |= SLPBTN_STS;
+ pmt_update_sci(s);
+ spin_unlock(&s->lock);
+}
+
/* Set the correct value in the timer, accounting for time elapsed
* since the last time we did that. */
static void pmt_update_time(PMTState *s)
#define XEN_DOMCTL_SENDTRIGGER_RESET 1
#define XEN_DOMCTL_SENDTRIGGER_INIT 2
#define XEN_DOMCTL_SENDTRIGGER_POWER 3
+#define XEN_DOMCTL_SENDTRIGGER_SLEEP 4
struct xen_domctl_sendtrigger {
uint32_t trigger; /* IN */
uint32_t vcpu; /* IN */